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ComLinkTM Series CY2LL843
High-drive Two-Channel LVDS Repeater/Mux
Features
* * * * * * * * * ANSI TIA/EIA-644-1995-compliant Designed for data rates to > 700 Mbs = (350 MHz) Single 2 x 2 with high-drive output drivers Low -voltage differential signaling with output voltages of 350 mV into 50-ohm load version (Bus LVDS) Single 3.3V supply Accepts 350-mV differential inputs Output Drivers are high-impedance when disabled or when VDD 1.5V 16-pin SOIC/TSSOP packages Industrial version available achieve signaling rates of 700Mbs. The receiver outputs can be switched to either or both drivers through the multiplexer control signals S0/S1. This provides flexibility in application for either a splitter or router configuration with a single device. The Cypress CY2LL843 are configured as a single two-channel repeater/Mux. The LVDS standard provides a minimum differential output voltage of 247 mV into a 50-ohm load and receipt of as little as 100 mV signals with up to 1V of DC offset between transmitter and receiver. The Cypress CY2LL843 doubles the output drive current to achieve BusLVDS signaling levels with a faster rise/fall times into 50-ohm load. A doubly terminated BusLVDS line enables multipoint configurations. Designed for both point to point based-band multi-point data transmission over controlled impedance lines.
Description
The Cypress CY2LL843 are differential line drivers and receivers that utilize Low Voltage Signaling or LVDS, to
Block Diagram
Pin Configuration
VDD
1DE
1A 1B 2A 2B
1Y 1Z 2Y 2Z
1B 1A
GND
S0
S1
CY2LL843
2DE
S0 1DE S1 2A 2B GND
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VDD VDD 1Y 1Z 2DE 2Z 2Y GND
16 pin SOIC/TSSOP
Cypress Semiconductor Corporation Document #: 38-07066 Rev. OBS
*
3901 North First Street
*
San Jose
*
CA 95134 * 408-943-2600 Revised December 02, 2004
ComLinkTM Series CY2LL843
Pin Description
Pin Number 1,2 3 4 5 6,7 8,9 10,11 12 14,13 15,16 Pin Name 1B, 1A S0 1DE S1 2A, 2B Differential Input Channel 1 Function Select 0 Data Enable Channel 1 Function Select 1 Differential Input Channel 2 Ground Differential Output Channel 2 Data Enable Channel 2 Differential Output Channel 1 Supply Voltage Pin Description
GND
2Y, 2Z 2DE IY, 1Z
VDD
Input
Table 1. Mux Function Table Output[[1]] S1 0 0 1 1 1Y/1Z 1A/1B 2A/2B 1A/1B 2A/2B 2Y/2Z 1A/1B 2A/2B 2A/2B 1A/1B Splitter A Splitter B Pass-thru Router Cross Point Router Function S0 0 1 0 1
Table 2. Absolute Maximum Rating Over Operating Free-Air Temperature[[2]] Supply Voltage Range, VDD(1) Voltage Range (DE,S0,S1) Input Voltage Range, VIN (A or B) ESD (All pins) Storage Temperature Range Table 3. Recommended Operating Conditions[3] Parameter VDD VIH VIL VID VIC TA Supply Voltage High Level Input Voltage Low Level Input Voltage Magnitude of Differential Input Voltage Common Mode Input Voltage Operating Free Air Temperature ( see Figure 11,Figure 12, Figure 13) (S0,S1,1DE,2DE) (S0,S1,1DE,2DE) 0.1 VID/2 -40 Description Min. 3 2 0.8 0.6 2.4 - (VID/2) VDD - 0.8 85 C Typ. 3.3 Max. 3.6 Unit V -0.5V to 4V -0.5V to 6.0V -0.5V to VDD + 0.5V Class 3, A: 2KV, B: 500V -65C to 150C
Notes: 1. See Figure 1. 2. Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is intended to be a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 3. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required
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ComLinkTM Series CY2LL843
Table 4. Receiver Electrical Characteristics Over Recommended Operating Conditions Parameter VITH+ VITHII II II (Off) Description Positive-going Differential Input Voltage Threshold Negative-going Differential Input Voltage Threshold Input Current ( A Inputs) Input Current (B Inputs) Power Off Current (A or B Inputs) Test Conditions VCM = 1.2V VCM = 1.2V VI = 0V VI = 2.4V VI = 0.8V VI = 2.4V VDD = 0V 0.1 0.5 -100 -0.5 -10 -10 10 10 10 Min. Typ. Max. 100 Unit mV mV uA uA uA uA uA
Table 5. Receiver Electrical Characteristics Over Recommended Operating Conditions Parameter VOD ~VOD VOC(SS) ~VOC(SS) VOC(PP) ICC Description Differential Output Voltage Swing Change in differential Output Voltage Swing between logic states Steady State Common-mode output voltage Change in Steady State Common-mode output between logic states Peak to Peak Common-mode output voltage Supply Current No load f = 100 MHz RL = 50 ohm, F = 100 MHz Both Channels Disabled IH IIL IOS IOZ Cin High Level Input Current Low Level Input Current Short Circuit Current High Impedance Output Current Input Capacitance Control Input Capacitance S0,S1,DE S0,S1,DE VIH = 5V VIL = 0.8V VOY or V0Z = 0V VOD = 0V VOD = 60mV VO= 0V or VDD 1A, 1B, 2A, 2B S0, S1, 1DE, 2DE 0.1 0.1 3 8 20 5 20 20 1 1 pF pF uA Test Conditions RL = 50 Ohm See Figure 11, Figures [15]-[19] See Figure 12 Min. 247 -50 1.125 -50 3 Typ. 340 Max. 454 50 1.375 50 Unit mV mV V mV
150 30 35 25
mV mA mA mA uA uA mA
Table 6. Differential Receiver to Driver Switching Characteristics Over Recommended Operating Conditions [[5]] Parameter TPLH TPHL Tsk(p) Tr Description Differential Propagation delay, High to Low Pulse Skew ( TPHL-TPLH) Transition Low to High Test Conditions Min. Typ.[[4]] 4 4 0.2 800 800 1500 1500 Max. 6 6 Unit nS nS nS pS pS Differential Propagation delay, Low to High CL = 10 pF (see Figure 14)
Tf Transition High to Low Notes: 4. All typical values are measured at 25C with a 3.3V supply. 5. These parameters are measured over supply voltage and temperature ranges recommended for the device.
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ComLinkTM Series CY2LL843
Table 6. Differential Receiver to Driver Switching Characteristics Over Recommended Operating Conditions (continued)[[5]] TPHZ TPLZ TPZH TPZL TPHL_skR1_Dx TPLH_skR1_Dx TPPHL_skR2_Dx TPLH_skR2_Dx DJ Propagation delay, High level to High impedance output Propagation delay, Low level to High impedance output Propagation delay, high impedance to High level output Propagation delay, high impedance to Low level output Channel to Channel skew-receiver 1 to Any mux related drivers Channel to Channel skew-receiver 1 to Any mux related drivers Channel to Channel skew-receiver 2 to Any mux related drivers Channel to Channel skew-receiver 2 to Any mux related drivers Deterministic Jitter (100MHz, 25C,
VID =0.4V, S0, S1 = 0)
(see Figure 14)
4 4.3 3 2 95 95 95 95
10 10 10 10
nS nS nS nS pS pS pS pS pS
(see Figure 7) PRBS-Differential
95
Table 7. High Frequency Parametrics Parameter Fmax Description Maximum frequency VDD = 3.3V Test Conditions 50% duty cycle tW(50-50) Standard Load Circuit.
Router O ptions
S0/S1 1A/1B
Min.
Typ.
Max. 400
Unit MHz
Splitter O ptions
S0/S1 1Y/1Z
1A/1B
1Y/1Z
Cross Point Router
Splitter A
2A/2B 2Y/2Z
2A/2B
2Y/2Z
1A/1B
1Y/1Z
2A/2B
Pass Thru Router
1A/1B
1Y/1Z
Splitter B
2A/2B 2Y/2Z S0/S1
2Y/2Z
S0/S1
Figure 1. Two-channel Cross Point Switch/Mux
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ComLinkTM Series CY2LL843
Dynamic IDD CY 2LL843C VID=0.4, VIC=1.2V S0, S1=00 Temp = 25C
45.00 43.00 41.00 39.00 Idd (mA) Idd (mA) 37.00 35.00 33.00 31.00 29.00 27.00 25.00 50 100 150 200 250 300 350 400 Fin (MH z) Vdd=3.60V Vdd=3.30V Vdd=3.00V 45.00 43.00 41.00 39.00 37.00 35.00 33.00 31.00 29.00 27.00 25.00 50 100 150 200 250 300 350 400 Fin (MH z) Vdd=3.60V Vdd=3.30V Vdd=3.00V
D ynamic IDD C 2LL843C Y VID=0.4, VIC =1.2V S0, S1=01 Temp = 25C
Figure 2. Dynamic IDD vs. Frequency 25 C
D ynam ID C 2LL843C ic D Y VID =0.4, VIC =1.2V S0, S1=00 Tem =85C p
45.00 43.00 41.00 39.00 Idd (mA) 37.00 35.00 33.00 31.00 29.00 27.00 25.00 50 100 150 200 250 300 Vdd=3.60V Vdd=3.30V Vdd=3.00V 25.00 50 30.00 Vdd=3.60V Vdd=3.30V Vdd=3.00V 350 400 100 150 200 250 300 350 400 Idd (mA) 40.00 45.00 50.00
D ynam ID C 2LL843C ic D Y VID =0.4, VIC =1.2V S0, S1=01 Tem =85C p
35.00
F (MH in z)
F (MH in z)
Figure 3. Dynamic IDD vs. Frequency 85 C
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ComLinkTM Series CY2LL843
V DD=3.30V , Te m p = 25 C 0.500 0.300 0.200 0.100 20 120 220 Fr e q (M Hz) 1Y 1Z 2Y 2Z 320
VDD=3.30V, Temp = 85 C
Vod (V) 0.500 0.300 0.100 20 120 220 320 Fre q (MHz) 1Y 1Z 2Y 2Z
Vod (V)
0.400
Figure 4. VOD vs. Frequency
VOC(ss) [VOC(pp) <0.50V]
VOC(ss) [ VOC(pp) <0.050V ]
1.280 1.270 1.260 1.250 20 120 220 Freq (MHz) 320
1.280 1.270 1.260 1.250 20 120 220 320 Freq (MHz)
1Y/1Z 2Y/2Z
1Y/1Z
2Y/2Z
Figure 5. VOC(ss) vs. Frequency
VDD =3.30V, Temp = 25 C 60.0 PW (ns) PW (ns) 40.0 20.0 0.0 0 100 200 Freq (MHz) 1Y 1Z 2Y 2Z 1Y 300 400 60.0 40.0 20.0 0.0 20 120 220 Freq (MHz) 1Z 2Y 2Z 320 VDD-3.30V, Temp = 25 C
Figure 6. Pulse width vs. Frequency
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ComLinkTM Series CY2LL843
VDD= 3.30V, Temp = 25 C 200 150 100 50 0 20 120 220 Freq (MHz) 1Y/1Z 2Y/2Z 320
Dj Deterministic Jitter (P-P)
Figure 7. Deterministic Jitter (p-p) vs. Frequency
V DD=3.30V , Te m p = 25 C 0.500 0.300 0.200 0.100 20 120 220 Fre q (M Hz) 1Y 1Z 2Y 2Z 320
VDD=3.30V, Temp = 85 C
Vod (V) 0.500 0.300 0.100 20 120 220 320 Fre q (MHz) 1Y 1Z 2Y 2Z
Vod (V)
0.400
Figure 8. TPLH vs. VIC 3.3V, 50 MHz
Document #: 38-07066 Rev. OBS
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ComLinkTM Series CY2LL843
Temp = 25C 6.000 5.500 5.000 4.500 4.000 3.500 0 0.5 1 VIC 1.5 2 2.5 VID 0.400
TPHL
Figure 9. TPHL vs. VIC 3.3V, 50 MHz
Temp=85C
100.00 80.00 60.00
TPLH-TPHL (ps)
40.00 20.00 0.00 -20.00 50 -40.00 -60.00 -80.00 -100.00 Freq. (MHz)
Figure 10. TPLH-TPHL vs. VIC 3.3V
100
150
200
250
300
350
400
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ComLinkTM Series CY2LL843
A
Pulse Generator
Y R D Z RL
P ulse G enerator
A B R DE D
Y Z
B
RL & RC
DE 10 pF
CL = 10pF
10 pF
10 pF
VIA
1
1 .2 V C M
1.4 V
0 V D if f e r e n t ia l
VI(A) VI(B)
1.4V 1.0V
VIB V0Y
1 .2 V C M
1.0 V 1.4 V
0 V D iff e r e n t ia l
0.0V
V0Z
TPLH TPHL
1.0 V
tF
tR
80%
0 V D if f e r e n t ia l
Figure 11. Test Circuit and Voltage Definitions for the Differential Output Signal[[6],[7],[8]]
A
Pulse Generator
20%
V0Y - V0Z
tR
tF
Y R D Z
RL
B
Figure 13. Differential Receiver to Driver Propagation Delay and Driver Transition Time[[6],[10],[11]]
1.0 V or 1.2V
A B R D
DE 10 pF
CL = 10pF
Y Z 1.2V
1.2V
VI(A) VI(B)
1.4V 1.0V
DE
CL =10 pF 2.0V
Voc (pp)
DE
1.4V
TPZH TPZH TPLZ
1.15V 1.25V
0.8V 1.4V 1.2V 1.2V 1.0V
VDD
Voc (ss)
V0Y or V0Z V0Y or V0Z
Figure 12. Test Circuit and Voltage Definitions for the Driver Common-Mode Output Voltage[[6],[7],[8],[9]]
Figure 14. Test Circuit & Voltage Definitions for the Driver Common-Mode Output Voltage[[6],[10]]
Notes: 6. All input pulses are supplied by a frequency generator with the following characteristics: tR and tF 1 nS; pulse rep. rate = 50 MppS; pulse width = 10 0.2 nS. 7. RL = 50 Ohm. 8. CL includes instrumentation and fixture capacitance within 6 mm of the DUT. 9. VOC measurement requires equipment with a 3 dB bandwidth of at least 300 MHz. 10. RL = 50 Ohm 1%. 11. Point to Point: RL = 50 Ohm 1% CL 3 pF.
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ComLinkTM Series CY2LL843
Application Engineering
Z O =50
Pulse Generator
Table 8. Technical Notes on STD Drive (LL842, A and D) vs. High Drive (LL843, B and C)[[12]]
RL=100 ohm
A VOX 1.2 1.0 0.25 0.45 1.4 1.4 DC Offset VOD Min. VOD Max
B 1.2 1.0 0.5 0.9 1.4 1.4
C 1.2 1.0 0.25 0.45 0.6 0.6
D 1.2 1.0 0.125 0.225 0.6 0.6
Unit V V V V ns ns
Z O =50
CL = 10pF 2 locations
T/Rise T/Fall
Figure 15. Termination Scheme for 100-Ohm External Termination
ZO=50
100 ohm R e c e iv e r c h ip w ith 1 0 0 O h m o n c h ip te rm in a tio n
Standard Drive Current drive of 1i
+/i
Hi Drive Current drive of 2i +/2i
ZO=50
CL CL
A
100 ohm
B
100 ohm
Figure 16. Termination Scheme for 100-Ohm Self-termination Interface Chip
+/i
D
50 ohm
+/2i
25 ohm
C
25 ohm
50 ohm
Typical Characteristics (@VDD = 3.3V/TA = 25C)
CY2LL843
5 Current (ma) 0 -5 -10 -15 -20 0 1 2 Voltage 3 4 Voh - Ioh
Note: 12. See Figure 19.
Figure 19. Comparison Standard Drive `842 vs. High Drive `843
Figure 17. VOH vs. IOH
CY2LL843
8 Current (ma) 6 4 2 0 -2 0 1 2 Voltage 3 4 Vol - Iol
Figure 18. Low-level Output vs. Current
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ComLinkTM Series CY2LL843
Ordering Information
Part Number CY2LL843SI CY2LL843SIT CY2LL843ZI CY2LL843ZIT CY2LL843SC CY2LL843SCT CY2LL843ZC CY2LL843ZCT 16-pin SOIC 16-pin SOIC-Tape and Reel 16-Pin TSSOP 16-pin TSSOP-Tape and Reel 16-pin SOIC 16-pin SOIC-Tape and Reel 16-pin TSSOP 16-pin TSSOP-Tape and Reel Package Type Product Flow Industrial, -40C to 85C Industrial, -40 to 85C Industrial, -40 to 85C Industrial, -40C to 85C Commercial, 0C to 70C Commercial, 0C to 70C Commercial, 0C to 70C Commercial, 0C to 70C
Package Drawings and Dimensions
16-Lead (150-Mil) Molded SOIC S16
51-85068-A
Document #: 38-07066 Rev. OBS
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ComLinkTM Series CY2LL843
Package Drawings and Dimensions (continued)
16-pin Thin Shrunk Small Outline Package (4.40 MM Body) Z16
51-85091
All product and company names mentioned in this document are the trademarks of their respective holders.
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(c) Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
ComLinkTM Series CY2LL843
Document Title: CY2LL843 High-drive Two-Channel LVDS Repeater/Mux Document Number: 38-07066 REV. ** *A OBS ECN No. 116745 122751 294832 Issue Date 08/01/02 12/14/02 See ECN Orig. of Change CTK RBI RGL New Data sheet Add power up requirements to operating conditions information To Obsolete the DS Description of Change
Document #: 38-07066 Rev. OBS
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